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Tuesday, February 10, 2015

Verilog Behavioral Program for Data Converters

BINARY - TO - GRAY CONVERTER (4 BIT) :


module binarytogray(a,b);
input[3:0]a;
outputreg [3:0]b;
always@(a)
begin
b[3]<=a[3];
b[2]<=a[3]^a[2];
b[1]<=a[2]^a[1];
b[0]<=a[1]^a[0];
end
end module

GRAY TO BINARY CONVERTER (4 BIT) :


module graytobinary(g,b);
input [3:0] g;
output reg [3:0] b;
always@(g)
begin
b[3]<=g[3];
b[2]<=b[3]^g[2];
b[1]<=b[2]^g[1];
b[0]<=b[1]^g[0];
end
end module

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